1. Field of the Invention
The present invention relates to a display that employs a dot inversion drive scheme for a plurality of lines, and a method for driving the display.
2. Prior Art
A liquid crystal display (LCD) is smaller in power consumption than a cathode-ray tube or the like and does not occupy much space, and thus a liquid crystal display is now used as one of principal visual displays. Among them, an active matrix liquid crystal display using TFTs (thin-film transistors) achieves high resolution and is adaptable to a large screen, and therefore, an active matrix liquid crystal display has a wide range of applications such as a personal computer display and a TV screen.
In each of active matrix displays, TFTs are arranged in a matrix pattern on a display panel. The operations of these TFTs are controlled by driver ICs that are normally provided at a frame portion of the display panel. The driver ICs include a source driver and a gate driver, and the operations of these driver ICs are each controlled by a signal outputted from a controller. The controller generates various signals, including a clock signal, so as to carry out appropriate control.
Among the above-described active matrix displays, the current liquid crystal display carries out control called “dot inversion drive” in order to prevent, for example, screen burn-in in liquid crystal.
FIGS. 7A through 7C are diagrams schematically illustrating the control of a liquid crystal display in which a conventional dot inversion drive scheme is employed. FIGS. 8A through 8C are timing charts each showing the waveforms of outputs from output terminals of a source driver and an output control signal in the respective conventional examples shown in FIGS. 7A through 7C. In FIGS. 7A through 7C, the polarities of respective sub-pixels on a display panel are shown for each frame. In each frame shown in the diagrams, the horizontal direction corresponds to the direction in which scanning lines extend in the panel, while the vertical direction corresponds to the direction in which signal lines extend in the panel. “H” shown in the diagrams means a horizontal scanning period, and indicates a scanning line connected to sub-pixels. Herein, an element that includes TFTs and liquid crystal capacitors or light-emitting devices and displays a single dot on the display panel is called a “picture element (or pixel)”. Furthermore, sub-elements that constitute a single picture element and display respective colors, e.g., “red (R)”, “green (G)” and “blue (B)”, in full-color display are each called a “sub-pixel”.
FIG. 7A illustrates a so-called “dot matrix inversion control” in which the polarities of the sub-pixels connected to a single signal line are alternately inverted, and are inverted in every 1H cycle (for each row). The polarities of the respective sub-pixels are switched for each frame. The row direction corresponds to the direction in which the scanning lines extend in the respective diagrams of FIG. 7.
In carrying out such control, as shown in FIG. 8A, the polarity of the potential of an output terminal Y (2n−1), located in the (2n−1)-th column of the source driver for supplying voltage to the sub-pixels, is inverted in every 1H cycle, and the waveform of the potential of the output terminal Y (2n−1) is almost uniformly changed when the polarity thereof is positive and is also almost uniformly changed when the polarity thereof is negative. In particular, when the polarity of the output terminal is positive, the ultimate voltage of the output terminal Y (2n−1) is almost the same at the end of one horizontal scanning period, and when the polarity of the output terminal is negative, the ultimate voltage of the output terminal Y (2n−1) is also almost the same at the end of one horizontal scanning period. That is, the ultimate potential of the output terminal is almost the same in each line.
Although the polarity of an output terminal Y (2n) in the 2n-th column adjacent to the output terminal Y (2n−1) is opposite to that of the output terminal Y (2n−1), potential changes of the output terminal Y (2n) are substantially uniform when the polarity thereof is positive and when the polarity thereof is negative.
Therefore, in the dot matrix inversion control shown in this description, screen flicker is suppressed, and thus display quality is improved. Since the liquid crystal display in this description employs a common-inversion drive scheme, a state in which the polarity of an output terminal is “positive” means a state in which the potential of the output terminal exceeds a common voltage, and a state in which the polarity of an output terminal is “negative” means a state in which the potential of the output terminal is below a common voltage.
Besides, two line dot matrix inversion control as shown in FIG. 7B is also carried out. Herein, “n line dot matrix inversion control” signifies the control for changing the polarities of the sub-pixels for n lines in the direction in which the signal lines extend (i.e., the vertical direction in the panel shown in the respective diagrams of FIG. 7). Therefore, the “two line dot matrix inversion control” refers to a method for carrying out control so that the polarities of the sub-pixels in the (2m−1)-th row and the 2m-th row become identical (m is a natural number). Further, in this control method, the polarities of the respective sub-pixels are inverted for each frame.
In the two line dot matrix inversion control described above, the polarities of the respective sub-pixels are switched in every 2H cycle as shown in FIG. 8B, and therefore, power consumption is reduced as compared with the dot matrix inversion control shown in FIG. 7A in which charge and discharge are repeated in every 1H cycle.
However, in this control method, even though power consumption is reduced, the potentials of the output terminals differ for each line, and thus image quality might be degraded.
As shown in FIG. 8B, if the ultimate potential of the output terminal Y (2n−1) at the end of 1H is compared with that of the output terminal Y (2n−1) at the end of 2H, the potential of the output terminal Y (2n−1) at the end of 2H is higher than that of the output terminal Y (2n−1) at the end of 1H. On the other hand, the potential of the output terminal Y (2n) at the end of 2H is lower than that of the output terminal Y (2n) at the end of 1H. This means that, in the same frame, the absolute value of a difference between the output voltage in the second row (i.e., in the second line) and the target voltage is smaller than that of a difference between the output voltage in the first row (i.e., in the first line) and the target voltage, and the brightness of the sub-pixels in the second row is greater than that of the sub-pixels in the first row. Besides, in the next frame, even if the polarities are switched, the absolute value of the target voltage for each output terminal does not change, and therefore, variations occur in brightness of each sub-pixel.
In order to solve the above-described problems, the adjacent output terminals of the source driver are short-circuited for a certain period of time. If the adjacent output terminals are electrically connected, the potentials of both the output terminals are changed so as to be uniformized. This operation for electrically connecting two or more output terminals will be hereinafter called “charge sharing”.
In the example shown in FIG. 7C, the charge sharing is carried out for a certain period of time from the start of each horizontal scanning period in the two line dot matrix inversion control similar to that shown in FIG. 7B. As a result, as shown in FIG. 8C, since the potentials of the adjacent output terminals of the source driver are uniformized, potential variations with respect to the target potential are reduced irrespective of the polarity of each output terminal.
Next, an exemplary configuration of a source driver including an electrical charge recovering means for carrying out this charge sharing will be described. The source driver described below is used not only in the two line dot matrix inversion drive scheme, but also in general dot inversion drive schemes.
FIG. 9 is a block diagram illustrating the configuration of a source driver that is generally used in a liquid crystal display, and FIG. 10 is a timing chart showing changes in various control signals during one horizontal scanning period in the source driver.
As shown in FIG. 9, the source driver includes: a gray level data input means 110 for receiving an image data signal and a data capture signal and for outputting gray level data; a first polarity switching means 112 for receiving an output signal from the gray level data input means 110, a polarity switching signal and a clock signal, and for switching the polarity of each output terminal; a positive polarity D-A converter (hereinafter abbreviated as a “positive polarity DAC”) 114 for receiving an output from the first polarity switching means 112 and for receiving the supply of a reference voltage; a negative polarity D-A converter (hereinafter abbreviated as a “negative polarity DAC”) 116 for receiving an output from the first polarity switching means 112 and for receiving the supply of a reference voltage; a second polarity switching means 118, which is controlled by a polarity switching signal, for outputting an output signal from the positive polarity DAC 114 or an output signal from the negative polarity DAC 116; output terminals Y (2n−1) and Y (2n) connected to operational amplifiers 120a and 120b, respectively, each of which receives an output from the second polarity switching means 118 and is controlled by an output control signal; and an electrical charge recovering means 122 for electrically connecting the output terminals Y (2n−1) and Y (2n) for a certain period of time. In this source driver, gray level data responsive to image data is transmitted to sub-pixels via the DACs and operational amplifiers, and the polarities of the adjacent output terminals Y (2n−1) and Y (2n) are controlled so as to be opposite to each other by the first and second polarity switching means 112 and 118.
As shown in FIG. 10, in the source driver shown in FIG. 9, when a data capture signal rises to a high level during a horizontal scanning period, the image data signal is captured into the gray level data input means 110. The input of the image data signal is automatically finished at the time when final data A is inputted.
Next, when the output control signal rises to a high level, the polarity of each output terminal is determined, and a path in the source driver is switched in accordance with the polarity of each output terminal determined by the first and second polarity switching means 112 and 118. At this time, the electrical charge recovering means 122 enters an electrical charge recovery period during which the electrical charge recovering means 122 electrically connect the output terminals Y (2n−1) and Y (2n). During the electrical charge recovery period, the potentials of the output terminals Y (2n−1) and Y (2n) become close to each other. The output control signal rises to a high level without exception after the input of the image data signal has been finished.
Then, when the output control signal falls to a low level, the electrical charge recovery period is finished, and the output, responsive to the gray level data captured during the previous horizontal scanning period, is outputted from the output terminals Y (2n−1) and Y (2n).
FIG. 10 shows an example in which the potentials of the output terminals Y (2n−1) and Y (2n) are interchanged. As shown in this example, when the polarity of each output terminal is switched from the last horizontal scanning period, electrical charge rapidly moves from the sub-pixels, which are connected to one terminal, to the sub-pixels, which are connected to the other terminal. Therefore, electric power is efficiently utilized.
By employing the above-described inversion drive scheme, a reduction in power consumption can be achieved.